Implementing Serial Bus Interfaces Using General Purpose Digital InstrumentationJOHNSON, Dale.IEEE instrumentation & measurement magazine. 2010, Vol 13, Num 4, pp 8-13, issn 1094-6969, 6 p.Conference Paper

Fieldbus ready to start the last lap? A plant view of fieldbus in useSPEAR, M.Process engineering. 1994, Vol 75, Num 4, pp 37-39, issn 0370-1859Article

ETUDE D'ALGORITHMES D'ECHANGE D'INFORMATION DANS CERTAINS TYPES DE RESEAUX A BUS = STUDY OF COMMUNICATION ALGORITHMS IN CERTAIN KINDS OF BUS-CONNECTION NETWORKSHily, Andre; Sotteau, Dominique.1999, 132 p.Thesis

Berechnung der Anzahl paralleler Buskanäle in einem Mehrmikrorechnersystem = Le calcul du nombre de canaux tous parallèles dans un système à microordinateurs multiples = Calculation of the number of parallel bus channels in a multi-microcomputer systemeSCHULZE, R.Nachrichtentechnik. Elektronik. 1984, Vol 34, Num 7, pp 261-263, issn 0323-4657Article

Formal verification of module interfaces against real time specificationsCHAKRABARTI, Arindam; DASGUPTA, Pallab; CHAKRABARTI, P. P et al.Design automation conference. 2002, pp 141-145, isbn 1-58113-461-4, 5 p.Conference Paper

Static Pulsed Bus for on-chip interconnectsKHELLAH, Muhammad; TSCHANZ, James; YE, Yibin et al.2002 symposium on VLSI circuits. 2002, pp 78-79, isbn 0-7803-7310-3, 2 p.Conference Paper

Zur Entwicklung und Anwendung eines für die Prozess- und Büroautomatisierung geeigneten lokalen Netzes = Développement et application d'un réseau local convenant à l'automatisation de bureaux et à l'automatisation de processus = Development and application of a local network available to office and processus automationREINIG, G.Wissenschaftliche Zeitschrift der Technischen Universität Dresden. 1988, Vol 37, Num 3, pp 234-237, issn 0043-6925Article

Erhöhung der Zuverlässigkeit busorientierter Automatisierungssysteme = Amélioration de la fiabilité d'un système d'automatisation à canal-bus = Increasing the valiability of bus-oriented automation systemsVOGT, R; BENDER, K.Automatisierungstechnische Praxis. 1987, Vol 29, Num 2, pp 53-57, issn 0178-2320Article

Wartezeit auf Busverfügbarkeit in einen Mehrrechnersystem = Temps d'attente à l'accès du bus dans les systèmes à ordinateurs multiples = Waiting times for bus availability in multicomputer systemsSCHULZE, R; CIMANDER, W.Nachrichtentechnik. Elektronik. 1984, Vol 34, Num 2, pp 50-54, issn 0323-4657Article

Finding maximum on an array processor with a global busBOKHARI, S. H.IEEE transactions on computers. 1984, Vol 33, Num 2, pp 133-139, issn 0018-9340Article

Multimikroprozessorsystem zur Steuerung eines Intelligenten Grafischen Terminals (IGT). Systemarchitektur = Système multimicroprocesseur pour la commande d'un terminal graphique intelligent. Architecture du système = Multimicroprocesser system for an intelligent graphical-terminal control. System architectureLEICH, H; LEVCHANOVSKY, F. V; PRIKHODKO, V. I et al.Nachrichtentechnik. Elektronik. 1983, Vol 33, Num 11, pp 466-471, issn 0323-4657Article

Hardware method of synchronising processes without using a clockTAUB, D. M.Electronics Letters. 1983, Vol 19, Num 19, pp 772-773, issn 0013-5194Article

Graph-based codeword selection for memoryless low-power bus codingGUSTAFSSON, O.Electronics Letters. 2004, Vol 40, Num 24, pp 1531-1532, issn 0013-5194, 2 p.Article

A comparison of three verification techniques: Directed testing, pseudo-random testing and property checkingBARLEY, Mike G; GALPIN, Darren; BLACKMORE, Tim et al.Design automation conference. 2002, pp 819-823, isbn 1-58113-461-4, 5 p.Conference Paper

Fortführung der Ex-Feldbus-Untersuchung = Continuation of investigation concerning feldbus in hazardous areasPINKOWSKI, G.Automatisierungstechnische Praxis. 1992, Vol 34, Num 11, pp 617-622, issn 0178-2320Article

Semi-Markov performance model of an extended token bus protocolAKHTAR, S; SOOD, A. K; SRINIVASAN, K. Y et al.International journal of electronics. 1988, Vol 65, Num 5, pp 907-921, issn 0020-7217Article

Backplane bus structures and systemsKARANASSIOS, V; HORLICK, G.Talanta (Oxford). 1985, Vol 32, Num 8A, pp 583-599, issn 0039-9140Article

Architecture of a digital signal processorUNGERBOECK, G; MAIWALD, D; KAESER, H.-P et al.IBM journal of research and development. 1985, Vol 29, Num 2, pp 132-139, issn 0018-8646Article

Failure of instruction prefetching of 8088/286/386 microprocessors in XT/AT systemsLUA, K. T.Microprocessing and microprogramming. 1990, Vol 29, Num 2, pp 97-106, issn 0165-6074, 10 p.Article

An assessment of impulsive noise via a double-ringing modelBRIDGWOOD, M. A.IEEE transactions on electromagnetic compatibility. 1985, Vol 27, Num 3, pp 126-130, issn 0018-9375Article

Bus and memory interference in double bus multiprocessor systemsMARSAN, A; CARRA, G.Microprocessing and microprogramming. 1984, Vol 13, Num 2, pp 73-96, issn 0165-6074Article

Etude d'une voie de communication adaptée au traitement de données en temps réel = Study of adaptative transmission channel in data processing in real timeGIROIR, Didier.1983, 181 fThesis

A fast and accurate validation technique for operating system in multi-processor system-on-chip designBACIVAROV, Iuliana; JERRAYA, Ahmed A; YOO, Sungjoo et al.SPIE proceedings series. 2003, pp 342-348, isbn 0-8194-5100-2, 7 p.Conference Paper

A centralized bus architecture for local area networksACAMPORA, A. S; HLUCHYI, M. G; TSAO, C. D et al.Journal of telecommunication networks. 1984, Vol 3, Num 2, pp 89-102, issn 0276-0037Article

A complete functional fault model for microprocessor internal BUS malfunctionsMARCHAL, D.Rapport de recherche - Informatique et mathématiques appliquées de Grenoble, ISSN: 0750-7380 ; 475. 1984, 32 p.Report